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rev. 1.0 10/10 copyright ? 2010 by silicon laboratories cp2104 cp2104 s ingle -c hip usb- to -uart b ridge single-chip usb to uart data transfer ?? integrated usb transceiver ; no external resistors required ?? integrated clock; no external crystal required ?? integrated 1024-byte one-time programmable rom for customizable product information ?? on-chip power-on reset circuit ?? on-chip voltage regulator: 3.45 v output usb function controller ?? usb specification 2.0 compliant; full-speed (12 mbps) ?? usb suspend states supported via suspend and suspend pins asynchronous serial data bus (uart) ?? all handshaking and modem interface signals ?? data formats supported: - data bits: 5, 6, 7, and 8 - stop bits: 1, 1.5, and 2 - parity: odd, even, mark, space, no parity ?? baud rates: 300 bps to 2 mbits ?? 576 byte receive buffer; 576 byte transmit buffer ?? hardware or x-on/x-off handshaking supported ?? four gpio signals for status and control ?? configurable i/o (1.8 v to v dd ) using v io pin ?? configurable i/o (v dd to 5 v) using external pull-up ?? rs-485 mode with bus transceiver control virtual com port device drivers ?? works with existing com port pc ap plications ?? royalty-free distribution license ?? windows 7 ? /vista ? /xp ? /server 2003 ? /2000 ? ?? mac ? os-x ?? linux ? usbxpress? direct driver support ?? royalty-free distribution license ?? windows 7/vista/xp/server 2003/2000 ?? windows ce ? 6.0, 5.0, and 4.2 example applications ?? upgrade of rs-232 legacy devices to usb ?? upgrade of rs-485 legacy devices to usb ?? cellular phone usb interface cable ?? pda usb interface cable ?? usb to rs-232 serial adapter supply voltage ?? self-powered: 3.0 to 3.6 v ?? usb bus powered: 4.0 to 5.25 v ?? i/o voltage: 1.8 v to v dd package ?? rohs-compliant 24-pin qfn (4x4 mm) ordering part number ?? CP2104-F03-GM temperature range: ?40 to +85 c figure 1. example system diagram cp2104 voltage regulator 48 mhz oscillator in out suspend suspend regin gnd rst d+ d- uart ri dcd cts rts rxd txd dsr dtr external rs-232 transceiver or uart circuitry (to external circuitry for usb suspend states) vbus d- d+ gnd usb connector vdd vbus usb function controller usb transceiver 576b tx buffer 576b rx buffer 1024b prom gpio.0 gpio.1 gpio.3 gpio.2 (to external circuitry for status and control) 4 vio external voltage supply or direct connection to vdd vpp
cp2104 2 rev. 1.0
cp2104 rev. 1.0 3 t able of c ontents section page 1. system overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 3. pinout and package defini tions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4. qfn-24 package specificati ons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 5. usb function controller and transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6. asynchronous seri al data bus (uart) interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.1. baud rate generati on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7. gpio pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7.1. gpio.0-1?transmit and re ceive toggle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.2. gpio.2?rs-485 transceive r bus control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.3. hardware flow control (rts and cts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8. one-time programmable rom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9. voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 10. cp2104 device drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 8 10.1. virtual com port drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.2. usbxpress drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 10.3. driver customization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.4. driver certification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 8 11. relevant application notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 document change list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 contact information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
cp2104 4 rev. 1.0 1. system overview the cp2104 is a highly-integrated usb-to-uart bridge controller providing a simp le solution for updating rs-232/rs-485 designs to usb using a minimum of co mponents and pcb space. the cp2104 includes a usb 2.0 full-speed function cont roller, usb transceiver, osc illator, one-time programm able rom, and asynchronous serial data bus (uart) with full modem control signals in a compact 4 x 4 mm qfn-24 package (sometimes called ?mlf? or ?mlp?). no other external usb components are required. the on-chip one-time programmable rom may be used to customize the usb vendor id, product id, product description string, power de scriptor, device release number, device serial number, and gpio configuration as desired for oem applications. royalty-free virtual com port (vcp) device drivers provided by silicon labs allow a cp2 104-based product to appear as a com port to pc applications. the cp2104 uart interface implements all rs-232/rs-485 signals, including control and handshaking signals, so existing s ystem firmware does not need to be modified. the device also features up to four gpio signal s that can be user-defined for status and control information. support for i/o interface voltages down to 1.8 v is provided via a v io pin. in many existing rs-232 designs, all that is required to update the design from rs-232 to usb is to replace th e rs-232 level-translator with the cp2104. direct access driver support is ava ilable through the sili con labs usbxpress driver set. se e www.silabs.com for the latest application notes and product s upport information for the cp2104. an evaluation kit for the cp2104 (part number: cp2104ek) is available. it includes a cp2104-based usb-to- uart/rs-232 evaluation board, a complete set of vc p device drivers, usb and rs-232 cables, and full documentation. contact a silicon labs sales repr esentatives or go to www.silabs.com to order the cp2104 evaluation kit.
cp2104 rev. 1.0 5 2. electrical characteristics table 1. absolute maximum ratings parameter conditions min typ max units ambient temperature under bias ?55 ? 125 c storage temperature ?65 ? 150 c voltage on rst , gpio or uart pin with respect to gnd v io > 2.2 v v io < 2.2 v ?0.3 ?0.3 ? ? 5.8 v io + 3.6 v voltage on v dd or v io with respect to gnd ?0.3 ? 4.2 v maximum total current through v dd , v io , and gnd ? ? 500 ma maximum output current sunk by rst or any i/o pin ? ? 100 ma note: stresses above those listed may cause permanent damage to t he device. this is a stress rating only, and functional operation of the devices at or exceeding the conditions in th e operation listings of this sp ecification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. table 2. global dc electrical characteristics v dd = 3.0 to 3.6 v, ?40 to +85 c unless otherwise specified. parameter conditions min typ max units digital supply voltage (v dd ) 3.0 ? 3.6 v digital port i/o supply voltage (v io )1.8?v dd v supply current 1 normal operation; v reg enabled ? 17.0 18.5 ma supply current 1 suspended; v reg enabled ?100200a supply current?usb pull-up 2 ?200228a specified operating temperature range ?40 ? +85 c notes: 1. if the device is connected to the usb bus, the usb pull- up current should be added to the supply current for total supply current. 2. the usb pull-up supply current values are ca lculated values based on usb specifications.
cp2104 6 rev. 1.0 table 3. uart and suspend i/o dc electrical characteristics v dd = 3.0 to 3.6 v, v io = 1.8 v to v dd , ?40 to +85 c unless otherwise specified. parameters conditions min typ max units output high voltage (v oh )i oh =?10a i oh =?3ma i oh =?10ma v io ?0.1 v io ?0.2 ? ? ? v io ?0.4 ? ? ? v output low voltage (v ol )i ol =10a i ol =8.5ma i ol =25ma ? ? ? ? ? 0.6 0.1 0.4 ? v input high voltage (v ih ) 0.7 x v io ??v input low voltage (v il )??0.6v input leakage current weak pull-up off weak pull-up on, v in = 0 v ? ? ? 25 1 50 a maximum input voltage open drain, logic high (1) ? ? 5.8 v table 4. reset electrical characteristics ?40 to +85 c unless otherwise specified. parameter conditions min typ max units rst input high voltage 0.75 x v io ??v rst input low voltage ? ? 0.6 v minimum rst low time to generate a system reset 15 ? ? s table 5. voltage regulator electrical specifications ?40 to +85 c unless otherwise specified. parameter conditions min typ max units input voltage range 3.0 ? 5.25 v output voltage output current = 1 to 100 ma* 3.3 3.45 3.6 v vbus detection input threshold 2.5 ? ? v bias current ? ? 120 a *note: the maximum regulator supply current is 100 ma. this includes the supply current of the cp2104. table 6. gpio output specifications ?40 to +85 c unless otherwise specified parameter conditions min typ max units rs-485 active time after stop bit ? 1 ? bit time* tx toggle rate ? 10 ? hz rx toggle rate ? 10 ? hz *note: bit-time is calculated as 1 / baud rate.
cp2104 rev. 1.0 7 3. pinout and p ackage definitions table 7. cp2104 pin definitions name pin # type description v dd 6 power in power out power supply voltage input. voltage regulator output. see section 9. v io 5 power in i/o supply voltage input. gnd 2 ground. must be tied to ground. rst 9d i/o device reset. open-drain ou tput of internal por or v dd monitor. an external source can initiate a syste m reset by driving this pin low for the time specified in table 4. regin 7 power in 5 v regulator input. this pin is the input to the on-chip voltage regu- lator. vbus 8 d in vbus sense input. this pin should be connected to the vbus signal of a usb network. v pp 16* special connect a 4.7 f capacitor between this pin and ground to support rom programming via usb interface. d+ 3 d i/o usb d+ d? 4 d i/o usb d? txd 21 d out asynchronous data output (uart transmit) rxd 20 d in asynchronous data input (uart receive) cts 18* d in clear to send control input (active low) rts 19* d out ready to send control output (active low) dsr 22* d in data set ready control input (active low) dtr 23* d out data terminal ready cont rol output (active low) dcd 24* d in data carrier detect co ntrol input (active low) ri 1* d in ring indicator control input (active low) suspend 17* d out this pin is logic high when the cp2104 is in the usb suspend state. suspend 15* d out this pin is logic low when the cp 2104 is in the usb suspend state. gpio.3 11* d i/o user-configurable input or output. gpio.2 12* d i/o user-configurable input or output. gpio.1 13* d i/o user-configurable input or output. gpio.0 14* d i/o user-configurable input or output. nc 10* this pin should be left unconnected or tied to v io . *note: pins can be left unconnected when not used.
cp2104 8 rev. 1.0 figure 2. qfn-24 pinout diagram (top view) regin vbus rst nc gpio.3 gpio.2 10 11 12 8 7 9 ri gnd d+ d- vio vdd 4 5 6 2 1 3 rts rxd txd dsr dtr dcd 22 23 24 20 19 21 cp2104-gm top view gpio.1 gpio.0 suspend vpp suspend cts 15 14 13 17 18 16 gnd (optional)
cp2104 rev. 1.0 9 4. qfn-24 package specifications figure 3. qfn-24 package drawing table 8. qfn-24 package dimensions dimension min typ max dimension min typ max a 0.70 0.75 0.80 l 0.30 0.40 0.50 a1 0.00 0.02 0.05 l1 0.00 ? 0.15 b 0.18 0.25 0.30 aaa ? ? 0.15 d 4.00 bsc. bbb ? ? 0.10 d2 2.55 2.70 2.80 ddd ? ? 0.05 e 0.50 bsc. eee ? ? 0.08 e 4.00 bsc. z ? 0.24 ? e2 2.55 2.70 2.80 y ? 0.18 ? notes: 1. all dimensions shown are in millim eters (mm) unless otherwise noted. 2. dimensioning and tolerancing per ansi y14.5m-1994. 3. this drawing conforms to jedec solid state outline mo-220, variation wggd except for custom features d2, e2, z, y, and l wh ich are toleranced per supplier designation. 4. recommended card reflow profile is per the jede c/ipc j-std-020 specific ation for small body components.
cp2104 10 rev. 1.0 figure 4. qfn-24 recommended pcb land pattern table 9. qfn-24 pcb land pattern dimensions dimension min max dimension min max c1 3.90 4.00 x2 2.70 2.80 c2 3.90 4.00 y1 0.65 0.75 e 0.50 bsc y2 2.70 2.80 x1 0.20 0.30 notes: general 1. all dimensions shown are in millim eters (mm) unless otherwise noted. 2. this land pattern design is based on the ipc-7351 guidelines. solder mask design 3. all metal pads are to be non-solder mask defined (nsmd). clearance between the solder mask and the metal pad is to be 60 ? m minimum, all the way around the pad. stencil design 4. a stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder paste release. 5. the stencil thickness should be 0.125 mm (5 mils). 6. the ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads. 7. a 2x2 array of 1.10 mm x 1.10 mm openings on a 1.30 mm pitch should be used for the center pad. card assembly 8. a no-clean, type-3 solder paste is recommended. 9. the recommended card reflow profile is per t he jedec/ipc j-std-020 specification for small body components.
cp2104 rev. 1.0 11 5. usb function controller and transceiver the universal serial bus (usb) functi on controller in the cp2104 is a u sb 2.0 compliant full-speed device with integrated transceiver and on-chip matching and pullup re sistors. the usb function controller manages all data transfers between the usb and the uart as well as comm and requests generated by the usb host controller and commands for controlling the function of the uart and gpio pins. the usb suspend and resume signals are supported for power management of both the cp2104 device as well as external circuitry. the cp2104 will enter suspend mode when suspend signaling is detected on the bus. on entering suspend mode, the cp2104 asserts the suspend and suspend signals. suspend and suspend are also asserted after a cp2104 reset until device configuration during usb enumeration is complete. the cp2104 exits the suspend mode when any of the following occur: resume signaling is detected or generated, a usb reset signal is detect ed, or a device reset occurs. on exit of suspend mode, the suspend and suspend signals are de-asserted. both suspend and suspend temporarily float high during a cp2104 reset. if this behavior is undesirable, a strong pulldown (10 k ? ) can be used to ensure suspend remains low during reset. the logic level and output mode (push-pull or open-drain) of various pins during usb suspend is configurable in the prom. see section 8 for more information. 6. asynchronous serial data bus (uart) interface the cp2104 uart interface consists of the tx (transmit) and rx (receive) data signals as well as the rts, cts, dsr, dtr, dcd, and ri control sign als. the uart supports rts/cts, dsr/dtr, and x-on/x-off handshaking. the uart is programmable to support a variety of data fo rmats and baud rates. if the virtual com port drivers are used, the data format and baud rate are set during com port configuration on the pc. if the usbxpress drivers are used, the cp2104 is configured th rough the usbxpress api. the data formats and baud rates available are listed in table 10. table 10. data formats and baud rates data bits 1 5, 6, 7, and 8 stop bits 1, 1.5 2 , and 2 parity type none, even, odd, mark, space baud rates 300 bps to 2.0 mbps notes: 1. data sizes of 5 and 6 bits are not supported at baud rates above 921600 bps. 2. 1.5 stop bits only available when using 5 data bits.
cp2104 12 rev. 1.0 6.1. baud rate generation the baud rate generator is very flexible, allowing the user to request any baud rate in the range from 300 bps to 2 mbps. if the baud rate cannot be di rectly generate d from the 48 mhz oscillator, th e device will choose the closest possible option. the actual baud rate is dictated by equation 1 and equation 2. equation 1. clock divider calculation equation 2. baud rate calculation most baud rates can be generated with an error of less than 1.0%. a general rule of thumb for the majority of uart applications is to limit the baud rate error on both the transmitter and the receiver to no more than 2%. the clock divider value obtained in equation 1 is rounded to the nearest integer, which may produce an error source. another error source will be the 48 mhz oscill ator, which is accurate to 0.25%. knowing the actual and requested baud rates, the total baud rate error can be found using equation 3. equation 3. baud rate error calculation 7. gpio pins the cp2104 supports four user-configurable gpio pins fo r status and control information. each of these gpio pins are usable as inputs, open-drain outputs, or push-pu ll outputs. three of these gpio pins also have alternate functions which are listed in table 11. by default, all of the gpio pins are configured as a gpio input. the configurati on of the pins is one-time programmable for each device. the difference between an open-drain output and a push-pull output is when the gpio output is driven to logic high. a logic high, open-drai n output pulls the pin to the vio rail through an internal, pull-up resistor. a logic high, push-pull output directly conne cts the pin to the vio voltage. open-drain outputs are typically used when interfacing to logic at a higher voltage than the vio pin. these pins can be safely pulled to the higher, external voltage through an external pull-up resistor. the maximum external pull-up voltage is 5 v. the speed of reading and writing the gp io pins is subject to the timing of the usb bus. gpio pins configured as inputs or outputs are not recomm ended for real-time signalling. more information regarding the configuration and us age of these pins can be found in ?an144: cp21xx customization guide? and ?a n223: port configuration and gpio for cp210x? ava ilable on the silicon labs website. table 11. gpio pin alternate functions gpio pin alternate function gpio.0 tx toggle gpio.1 rx toggle gpio.2 rs-485 transceiver control clock divider 48 mhz 2 prescale requested baud rate ? ? ---------------------------------------------------------------------------------------------------- = prescale 4 if requested baud rate 365 bps ? = prescale 1 if requested baud rate 365 bps ? = actual baud rate 48 mhz 2 prescale clock divider ? ? ---------------------------------------------------------------------------- - = prescale 4 if requested baud rate 365 bps ? = prescale 1 if requested baud rate 365 bps ? = baud rate error (%) 100 1 actual baud rate requested baud rate ---------------------------------------------------------- - ? ?? ?? ? 0.25% ? =
cp2104 rev. 1.0 13 7.1. gpio.0-1?trans mit and receive toggle gpio.0 and gpio.1 are configurable as transmit toggle and receive toggle pins. these pins are logic high when a device is not transmitting or receiving data, and they toggle at a fixed rate as specified in table 6 when data transfer is in progress. typically, these pins are connected to two leds to indicate data transfer. figure 5. transmit and receive toggle typical connection diagram 7.2. gpio.2?rs-485 tr ansceiver bus control gpio.2 is configurable as an rs-485 bus transceive r control pin which is connected to the de and re inputs of the transceiver. when configured for rs-485 mode, the pin is as serted during uart data transmission as well as line break transmission. the rs-485 mode of gpio.2 is active-high by default, and is also configurable for active-low mode. figure 6. rs-485 transceiver typical connection diagram cp2104 gpio.0 ? tx toggle gpio.1 ? rx toggle vio rs-485 transceiver r d de re cp2104 tx rx gpio.2 ? rs485
cp2104 14 rev. 1.0 7.3. hardware flow control (rts and cts) to utilize the functionality of the rts and cts pins of th e cp2104, the device must be configured to use hardware flow control. rts, or ready to send, is an active-low output from th e cp2104 and indicates to the external uart device that the cp2104?s uart rx fifo has not reached the watermark level of 383 bytes and is ready to accept more data. when the amount of data in the rx fifo reaches the watermark, the cp2104 pulls rts high to indicate to the external uart device to stop sending data. cts, or clear to send, is an active-low input to the cp21 04 and is used by the external uart device to indicate to the cp2104 when the external uart device?s rx fifo is getting full. the cp2104 w ill not send more than two bytes of data once cts is pulled high. figure 7. hardware flow control typical connection diagram cp2104 rs232 system tx rx tx rx rts cts rts cts
cp2104 rev. 1.0 15 8. one-time programmable rom the cp2104 includes an internal one-time programmable rom that may be used to customize the usb vendor id (vid), product id (pid), product description string, power descriptor, device re lease number, device serial number, gpio configuration, suspend pins and mode s as desired for oem applications. if the programmable rom has not been customized, the default configurat ion data shown in table 12 and table 13 is used. while customization of the usb configuration data is optional, customizing the vid/pid combination is recommended. a unique vid/pid combination will preven t the driver from conflicting with any other usb driver. a vendor id can be obtained from www.usb.org or silicon labs can provide a free pid for the oe m product that can be used with the silicon labs vid. customizing the serial number is al so recommended if the oem application is one in which it is poss ible for multiple cp210x-based devices to be connected to the same pc. the configuration data rom can be progra mmed by silicon labs prio r to shipment with the desired configuration information. it can also be programmed in-system over th e usb interface by adding a capacitor to the pcb. if configuration rom is to be programmed in-system, a 4. 7 f capacitor must be added between the vpp pin and ground. no other circuitry shou ld be connected to vpp during a programming operation, and v dd must remain at 3.3 v or higher to successfully write to the configuration rom. table 12. default usb configuration data name value vendor id 10c4h product id ea60h power descriptor (attributes) 80h (bus-powered) power descriptor (max. power) 32h (100 ma) release number 0100h (release version 01.00) serial number unique 8 character asc ii string (63 characters maximum) product description string ?cp2104 usb to uart bridge controller? (126 characters maximum) table 13. default gpio, uart, and suspend configuration data name value gpio.0 gpio input gpio.1 gpio input gpio.2 gpio input gpio.3 gpio input flush_buffers flush tx and rx fifo on open suspend push-pull suspend push-pull rs-485 level active-high
cp2104 16 rev. 1.0 9. voltage regulator the cp2104 includes an on-chip 5.0 to 3.45 v voltage regula tor. this allows the cp2104 to be configured as either a usb bus-powered device or a usb self-powered device . a typical connection diagram of the device in a bus- powered application using the regulator is shown in figure 8. when enabled, the voltage regulator output appears on the v dd pin and can be used to power external devices. see table 5 for the voltage regulator electrical characteristics. if the regulator is used to provide v dd in a self-powered applicati on, use the same connections from figure 8, but connect regin to an onboard 5 v supply, and disconnect it from the vbus pin i figure 8. typical bus-powered connection diagram note 3 note 2 note 1 vbus d+ d- gnd usb connector to external circuitry for usb suspend states standard uart signals cp2104 ri dcd gpio.2 gpio.3 gpio.0 gpio.1 suspend suspend dtr dsr rts cts txd rxd regin vdd gnd vio vbus d+ d- rst 1 ? f 1-5 ? f 0.1 ? f 3.45 v power vio 4.7 k note 1 : avalanche transient voltage suppression diodes compatible with full-speed usb should be added at the connector for esd protection. use littelfuse p/n sp0503baht or equivalent. note 2 : an external pull-up is not required, but can be added for noise immunity. note 3 : vio can be connected directly to vdd or to a supply as low as 1.8 v to set the i/o interface voltage. note 4 : if configuration rom is to be programmed via usb, a 4.7 ? f capacitor must be added between vpp and ground. during a programming operation, the pin should not be connected to other circuitry, and vdd must be at least 3.3 v. vpp 4.7 ? f note 4 to external circuitry for status and control
cp2104 rev. 1.0 17 alternatively, if 3.0 to 3.6 v power is supplied to the v dd pin, the cp2104 can function as a usb self-powered device with the voltage regulator bypassed. for this configuration, tie the regin input to v dd to bypass the voltage regulator. a typical connection diagram showing the dev ice in a self-powered app lication with the regulator bypassed is shown in figure 9. the usb max power and power attributes descriptor must match the device power usage and configuration. see application note ?an144: cp21xx devi ce customization guide? for information on how to customize usb descriptors for the cp2104. figure 9. typical self-powered connection diagram (regulator bypass) note 3 note 2 note 1 vbus d+ d- gnd usb connector to external circuitry for usb suspend states standard uart signals cp2104 ri dcd gpio.2 gpio.3 gpio.0 gpio.1 suspend suspend dtr dsr rts cts txd rxd regin vdd gnd vio vbus d+ d- rst 0.1 ? f vio 4.7 k note 1 : avalanche transient voltage suppression diodes compatible with full-speed usb should be added at the connector for esd protection. use littelfuse p/n sp0503baht or equivalent. note 2 : an external pull-up is not required, but can be added for noise immunity. note 3 : vio can be connected directly to vdd or to a supply as low as 1.8 v to set the i/o interface voltage. note 4 : if configuration rom is to be programmed via usb, a 4.7 ? f capacitor must be added between vpp and ground. during a programming operation, the pin should not be connected to other circuitry, and vdd must be at least 3.3 v. vpp 4.7 ? f note 4 to external circuitry for status and control 1-5 ? f 3.3 v power
cp2104 18 rev. 1.0 10. cp2104 device drivers there are two sets of device drivers available for cp21 04 devices: the virtual com port (vcp) drivers and the usbxpress direct ac cess drivers. only on e set of drivers is necessar y to interface with the device. the latest drivers are available at http://www.sila bs.com/products/mcu/pages/softwaredownloads.aspx. 10.1. virtual com port drivers the cp2104 virtual com port (vcp) device drivers a llow a cp2104-based device to appear to the pc's application software as a com port. application software running on the pc accesses the cp2104-based device as it would access a standard hardware com port. howeve r, actual data transfer between the pc and the cp2104 device is performed over the usb inte rface. therefore, existi ng com port applications ma y be used to transfer data via the usb to the cp2104-based device without modi fying the application. see application note ?an197: serial communications guide for the cp210x? for exampl e code for interfacing to a cp2104 using the virtual com drivers. 10.2. usbxpress drivers the silicon labs usbxpress driv ers provide an alternate so lution for interfac ing with cp2104 de vices. no serial port protocol expertise is required. instead, a simple, high-level applicati on program interface (api) is used to provide simpler cp210x connectivity and functionalit y. the usbxpress for cp210x development kit includes windows device drivers, windows device driver installer and uninstallers, and a host inte rface function library (host api) provided in the form of a windows dynamic link lib rary (dll). the u sbxpress driver set is recommended for new products that also in clude new pc software. the usbxpress in terface is described in application note ?an169: usbxpress programmer's guide.? 10.3. driver customization in addition to customizing the device as described in "6 . asynchronous serial data bus (uart) interface" on page 11, the drivers and the drivers installation package can be also be customized. see application note ?an220: usb driver customization? fo r more informati on on generating customized vcp and usbxpress drivers. important note : the vid/pid in the drivers must match the vid/pi d in the device for the drivers to load properly then the device is connected to the pc. 10.4. driver certification the default drivers that are shipped with the cp2104 are microsoft windows hardware quality labs (whql) certified. the certification means that the drivers have be en tested by microsoft and their latest operating systems will allow the drivers to be installe d without any warnings or errors. the customized drivers that are generated using the ?a n220: usb driver customiz ation? software are not automatically certified. to become certified, they must go first through the microsoft dr iver reseller submission process. contact silicon labs suppor t for assistance with this process.
cp2104 rev. 1.0 19 11. relevant application notes the following application notes are applicable to the cp2104. the latest versions of these application notes and their accompanying software are available at http://www.silabs.com/products/mcu /pages/applicationnotes.aspx . ? an144: cp21xx device customization guide?this app lication note describes how to use the an144 software cp21xxsetids to configure the usb parameters on the cp21xx devices. ? an169: usbxpress programmer's guid e?this application not e describes the usbxpre ss api interface and includes example code. ? an197: serial communications guide for the cp21 0x?this application note describes how to use the standard windows com port function to communica te with the cp210x and includes example code. ? an220: usb driver customization? this application note describes how to use the an220 software to customize the vcp or usbxpress drivers with oem information. ? an223: port configuratio n and gpio for cp210x?this applicatio n note describes how to use the an223 software to configure the gpio other configurable pins.
cp2104 20 rev. 1.0 d ocument c hange l ist revision 0.2 to revision 0.3 ? updated figure 1, ?example system diagram,? on page 1. ? added figure , ?,? on page 10. ? added figure 8, ?typical bus-powered connection diagram,? on page 16. ? added figure 9, ?typical self-powered connection diagram (regulator bypass),? on page 17. ? added "6.1. baud rate generation" on page 12. ? moved table 5 to "2. electrical characteristics" on page 5. revision 0.3 to revision 0.4 ? updated ordering part number on page 1. ? updated self-powered supply voltage on page 1. ? updated usb pull-up supply current in table 2. ? updated output voltage in table 5. ? updated table 7 pin descriptions. ? updated table 10 baud rates. ? updated figure 9. revision 0.4 to revision 1.0 ? updated ordering part number on page 1. ? updated electrical specific ations throughout section 2. ? added table 6 ? updated section 7. ? updated section 8. ? added table 11 and table 13 ? updated descriptions of figures in section 9.
cp2104 rev. 1.0 21 n otes :
cp2104 22 rev. 1.0 c ontact i nformation silicon laboratories inc. 400 west cesar chavez austin, tx 78701 tel: 1+(512) 416-8500 fax: 1+(512) 416-9669 toll free: 1+(877) 444-3032 please visit the silicon labs technical support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. silicon laboratories, silicon labs, and usbxpre ss are trademarks of silicon laboratories inc. other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders the information in this document is believed to be accurate in a ll respects at the time of publication but is subject to change without notice. silicon laboratories assumes no responsibility for errors and om issions, and disclaims respons ibility for any consequences resu lting from the use of information included herein. a dditionally, silicon laboratories assumes no re sponsibility for the functioning of und escribed fea- tures or parameters. silicon laboratories reserves the right to make changes without further notice. silicon laboratories makes no warranty, representation or guarantee regarding the suitability of its pr oducts for any particular purpose, nor does silicon laboratories assume any liability arising out of the application or use of any product or circuit, and specif ically disclaims any and all liability, in cluding without limitation consequential or incidental damages. silicon laboratories products are not designed, intended, or authorized for use in applica tions intend- ed to support or sustain life, or for any other application in which the failure of the silicon laboratories product could crea te a situation where personal injury or death may occur. should buyer purchase or us e silicon laboratories products for any such unintended or unaut horized application, buyer sha ll indemnify and hold silicon laboratories harmless against all claims and damages.

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